UP主： 封面： 简介：SoC系统级芯片设计实验 (SoC系统级晶片设计实验) - SoC Design Laboratory授课老师：赖瑾 威盛电子Co-Founder, 前CTO; 台湾大学/台湾清华大学/台湾阳明交通大学(原台湾交通...
视频选集 Lec01 - Course plan Lec02 - HLS Lec03 - Verilog Lec04 - Lab3 Workbook Explained Lec05 - Verilog Delay Lec06 - Verilog FSM Lec07 - Lab3 Instruction Lec08 - SoC Introduction Lec09 - Caravel SoC Introduction Lec10 - Lab4-0 Introduction Lec11 - Single Cycle Processor Lec12 - Multi-Cycle Processor Lec13 - Processor-SuperScalar Lec14 - Lab4 Introduction Lec15 - Lab3 Design Structure Lec16 - Peripheral Interface Design Lec17 - Peripheral Serial Bus Lec18 - Timer, DMA Lec19 - Design Interrupt Lec20 - GPIO Lec21 - Lab6 Explanation Lec22 - LabD SDRAM Explanation Lec23 - Lab4-2 Performance Optimization
